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IDT74FCT3907 3.3V PC CLOCK SYNTHESIZER
3.3V PENTIUMTM CLOCK SYNTHESIZER
IDT74FCT3907 ADVANCE INFORMATION
COMMERCIAL TEMPERATURE RANGES
Integrated Device Technology, Inc.
FEATURES:
* 0.5 MICRON CMOS Technology * Generates keyboard, floppy disk, system reference, PCI and CPU clocks * 6 copies of PCI clock & 4 copies of CPU clock available * 14.31818MHz crystal input * CPU clock output skew <250ps Bus clock output skew <500ps * 0.03% output frequency accuracy * Power-on reset * Selectable CPU clock frequency (50/60/66.66MHz) * Internal loop filter * VCC = 3.3 0.3V * Available in 28 pin SOIC * Supports PentiumTM processor based designs * Meets Intel PentiumTM processor 3.3V Clock Driver specification (External Draft 1.0)
DESCRIPTION:
The IDT74FCT3907 Clock synthesizer is built using advanced dual metal CMOS technology. This device uses a 14.31818 MHz crystal input to synthesize the various motherboard clock frequencies. The output frequencies supported by the IDT74FCT3907 are as follows: Reference clocks (2) = 14.31818MHz Keyboard clock (1) = 12MHz Floppy disk clock (1) = 24MHz CPU clock (4) = 50/60/66.66 MHz (Selectable by SEL pins) Bus clock (6) = CPU clock / 2 The SEL0, 1 pins are used to choose appropriate CPUCLK and PCICLK frequencies or to put the device in a test mode. In the test mode, the device outputs various divisors of the test clock frequency. Refer to the function table in this datasheet for details on the different operating modes.
FUNCTIONAL BLOCK DIAGRAM
1 X1 (14.31818 MHz) X2 Oscillator Peripheral Clock Synthesizer Block
KBCLK (12MHz)
1
FDCLK (24MHz)
4 SEL0, 1 CPU Clock Synthesizer Block
CPUCLK 0-3
6
PCICLK 0-5
2
REF CLK 0,1 (14.31818 MHz)
OE
3245 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc. PentiumTM is a trademark of Intel Corp.
COMMERCIAL TEMPERATURE RANGES
(c)1995 Integrated Device Technology, Inc.
AUGUST 1995
9.10
DSC-4662/-
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IDT74FCT3907 3.3V PC CLOCK SYNTHESIZER
COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS (1)
Symbol VTERM(2) Rating Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Operating Temperature Temperature Under Bias Storage Temperature DC Output Current Commercial -0.5 to +4.6 -0.5 to VCC + 0.5 0 to 70 0 to +70 -55 to +125 -60 to +60 Unit V V C C C mA
VCC X1 X2 GND OE CPUCLK0 CPUCLK1 VCC CPUCLK2 CPUCLK3 GND SEL1 SEL0 VCC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 SO28-2
28 27 26 25 24 23 22 21 20 19 18 17 16 15
REFCLK0 REFCLK1 VCC KBCLK FDCLK GND PCICLK2 PCICLK3 VCC PCICLK4 PCICLK5 GND PCICLK1 PCICLK0
3245 drw 02
VTERM(3) TA TBIAS TSTG IOUT
3245 tbl 01 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Vcc terminals. 3. Input, Output and I/O terminals.
CAPACITANCE (TA = +25C, f = 1.0MHz)
Symbol Parameter(1) CIN Input Capacitance CI/O I/O Capacitance Conditions VIN = 0V VOUT = 0V Typ. 4.5 5.5 Max. Unit 6.0 pF 8.0 pF
3245 lnk 02 NOTE: 1. This parameter is measured at characterization but not tested.
PIN DESCRIPTION
Pin Name X1 X2 SEL0, 1 KBCLK FDCLK REFCLK 0, 1 CPUCLK 0-3 PCICLK 0-5 OE I/O I O I O O O O O I 14.31818 MHz Crystal Output CPUCLK Control Inputs Keyboard Clock (12MHz) Floppy Disk Clock (24MHz) Reference Clocks (14.31818 MHz) CPU Clocks PCI Bus Clocks Output Enable
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Description 14.31818 MHz Crystal Input. This is also the test clock input.
FUNCTION TABLE
OE 0 1 1 1 1 SEL0 X 0 0 1 1 SEL1 X 0 1 0 1 INPUT CLK 14.31818MHz 14.31818MHz 14.31818MHz 14.31818MHz TCLK (Test Clock) CPUCLK Hi-Z 50MHz 60MHz 66.66MHz TCLK/2 PCICLK Hi-Z CPUCLK/2 CPUCLK/2 CPUCLK/2 TCLK/4 REFCLK Hi-Z 14.31818MHz 14.31818MHz 14.31818MHz TCLK FDCLK Hi-Z 24MHz 24MHz 24MHz TCLK/4 KBCLK Hi-Z 12MHz 12MHz 12MHz TCLK/8
3245 tbl 04
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IDT74FCT3907 3.3V PC CLOCK SYNTHESIZER
COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Commercial: TA = 0C to 70C, VCC = 3.3V 0.3V
Symbol VIH VIL II H II L IOZH IOZL VIK VOH VOL IOS IOS ICCZ Parameter Input HIGH Level (Input pins) Input HIGH Level (I/O pins) Input LOW Level (Input and I/O pins) Input HIGH Current (Input pins)(5) Input HIGH Current (I/O pins)(5) Input LOW Current (Input pins)(5) Input LOW Current (I/O pins)(5) High Impedance Output Current (3-State Output pins) ((6) Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Short Circuit Current(4,6) Short Circuit Current(4,7) Quiescent Power Supply Current VCC = Max. VCC = Max. VI = 5.5V VI = VCC VI = GND VI = GND VO = VCC VO = GND VCC = Min., IIN = -18mA VCC = Min. VIN = VIH or VIL VCC = Min. VIN = VIH or VIL VCC = Max., VO = IOH = -0.1mA IOH = -8mA COM'L. IOL = 0.1mA IOL = 8mA GND(3) -- -- -- -- -- -- -- VCC-0.2 VCC-0.6V -- -- -43 -34 -- -- -- -- -- -- -- -0.7 -- 3.0 -- 0.3 -135 -135 3.0 1 1 1 1 1 1 -1.2 -- -- 0.2 0.5 -206 -195 4.0 mA mA mA
3245 tbl 05
Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level
Min. 2.0 2.0 -0.5
Typ.(2) -- -- --
Max. 5.5 VCC+0.5 0.8
Unit V V A
A V V V
VCC = Max., VO = GND(3) VCC = Max., VIN = GND or VCC
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 3.3V, +25C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. The test limit for this parameter is 5A at TA = -55C. 6. Applies to CPUCLK. 7. Applies to PCICLK.
DYNAMIC OUTPUT DRIVE CHARACTERISTICS
Symbol IODH Parameter CPUCLK Output HIGH Current Test Conditions(1) VIN = VIH or VIL, VCC = 3.135V (3.3V -5%) VOUT = 2.4V VCC = 3.465V (3.3V +5%) VIN = VIH or VIL, VCC = 3.135V VOUT = 2.4V IODL IODL CPUCLK Output LOW Current PCICLK Output LOW Current VIN = VIH or VIL, VOUT = 0.4V VIN = VIH or VIL, VOUT = 0.4V VCC = 3.465V VCC = 3.135V VCC = 3.465V VCC = 3.135V VCC = 3.465V Min. -23 -- -14.5 -- 16 -- 9.4 -- Typ.(2) Max. -- -109 -- -100 -- 40 -- 38
3245 tbl 06
Unit mA
IODH
PCICLK Output HIGH Current
mA mA mA
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 3.3V, +25C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. The test limit for this parameter is 5A at TA = -55C.
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IDT74FCT3907 3.3V PC CLOCK SYNTHESIZER
COMMERCIAL TEMPERATURE RANGES
OSCILLATOR CHARACTERISTICS OVER OPERATING RANGE
Symbol CX1 CX2 II H II L IODH IODL Parameter X1 Input Capacitance X2 Output Capacitance X1 Input HIGH Current X1 Input LOW Current X2 Output HIGH Current X2 Output LOW Current VCC = Max., VIN = VCC VCC = Max., VIN = GND VOUT = VCC VOUT = GND Test Conditions(1) Min. Typ.(2) 20 20 5 -5 -1 1 Max. Unit pF pF A A mA mA
3245 tbl 07
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 3.3V, +25C ambient. 3. This parameter is guaranteed but not tested.
POWER SUPPLY CHARACTERISTICS
Symbol ICC IC Parameter Quiescent Power Supply Current TTL Inputs HIGH Total Power Supply Current VCC = Max. VIN = VCC -0.6V VCC = Max. Outputs Open 50% Duty Cycle OE = VCC
NOTES: 1. Typical values are at V CC = 3.3V, +25C ambient. 2. Per TTL driven input (VIN = VCC -0.6V); all other inputs at VCC or GND.
Test Conditions(1)
Min. Typ.(2) Max. -- 2.0 30
Unit A mA
CPUCLK = 50MHz CPUCLK = 60MHz CPUCLK = 66.66MHz
VIN = VCC VIN = GND
-- -- --
3245 tbl 08
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IDT74FCT3907 3.3V PC CLOCK SYNTHESIZER
COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
66.66MHz Symbol tCPU CPUCLK Period tCPUH tCPUL tR1, tF1 tSK1(o) tSK1(p) tPCI tPCIH tPCIL tR2, tF2 tSK2(o) tSK2(p) tSK3(o) tPS tCLOCK tPLOCK tPZL tPZH tPLZ tPHZ CPUCLK LOW Parameter Condition(1)
TBD
74FCT3907 60MHz Min.(2) 16.7 4 4 0.8 -- -- Max. -- -- -- 2.0 250
50MHz Min.(2) 20 4 4 0.8 -- -- Max. -- -- -- 2.0 250 Unit ns ns ns ns ps ps -- -- -- 2.0 500 ns ns ns ns ps ps 5.0 250 2 3 8.0 8.0 ns ps ms ms ns ns
3245 tbl 09
Min.(2) 15 4 4 0.8 -- -- 30 12 12 0.5 -- -- 1.0 -- -- -- 1.5 1.5
Max. -- -- -- 2.0 250
CPUCLK HIGH Time(3) Time(4) CPUCLK Rise, Fall Times (Between 0.4V & 2.4V) CPUCLK Output Skew CPUCLK Pulse Skew |tPLH-tPHL| PCICLK Period PCICLK HIGH Time PCICLK LOW Time PCICLK Rise, Fall Time (Between 0.4V & 2.4V) PCICLK Output Skew PCICLK Pulse Skew |tPLH-tPHL| CPUCLK to PCICLK Output Delay CPUCLK, PCICLK Period Stability CPUCLK Lock Time PCICLK Lock Time Output Enable Time OE to KBCLK, FDCLK, REFCLK, CPUCLK, PCICLK (Test Mode) Output Disable Time OE to KBCLK, FDCLK, REFCLK, CPUCLK, PCICLK (Test Mode)
-- -- -- 2.0 500
33.3 13.3 13.3 0.5 -- --
-- -- -- 2.0 500
40 16 16 0.5 -- --
5.0 250 2 3 8.0 8.0
1.0 -- -- -- 1.5 1.5
5.0 250 2 3 8.0 8.0
1.0 -- -- -- 1.5 1.5
NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays.
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IDT74FCT3907 3.3V PC CLOCK SYNTHESIZER
COMMERCIAL TEMPERATURE RANGES
TEST WAVEFORMS PROPAGATION DELAY, OUTPUT SKEW
PULSE WIDTH, RISE/FALL TIMES
tCPUH,tPCIH
1.5V
X1 tPD2 1.5V CPUCLK
2.4V 1.5V 0.4V
tR
tSK1(O) 1.5V PCICLK tSK2(O) tSK3(O)
3245 drw 03
tF
tCPUL, tPCIL
3245 drw 04
ENABLE AND DISABLE TIMES
ENABLE CONTROL INPUT tPZL OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH SWITCH 6V tPZH SWITCH GND 1.5V 0V 3V 1.5V tPHZ 0.3V VOH 0V tPLZ DISABLE 3V 1.5V 0V 3V 0.3V VOL
3245 drw 05 NOTES: 1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns
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IDT74FCT3907 3.3V PC CLOCK SYNTHESIZER
COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT XXXX XX FCT Temp. Range Device Type X Package X Process
Blank SO 3907 74
Commercial Small Outline IC 3.3V Clock Synthesizer 0C to +70C
3245 drw 06
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